CTICHINSTATUS (A53_CTI_1) Register Description
Register Name | CTICHINSTATUS |
---|---|
Offset Address | 0x0000000138 |
Absolute Address | 0x00FED20138 (CORESIGHT_A53_CTI_1) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000000 |
Description | The CTI Channel In Status Register provides the status of the ctichin inputs. |
CTICHINSTATUS (A53_CTI_1) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
CTICHINSTATUS | 3:0 | roRead-only | 0 | Shows the status of the ctichin inputs.1 = ctichin is active. 0 = ctichin is inactive.Because the register provides a view of the raw ctichin inputs, the reset value is unknown. There is one bit of the field for each channel input. |