CTICHINSTATUS (CTI) Register Description
| Register Name | CTICHINSTATUS |
|---|---|
| Offset Address | 0x0000000138 |
| Absolute Address |
0x00FEBF8138 (CORESIGHT_R5_CTI_0) 0x00FEBF9138 (CORESIGHT_R5_CTI_1) 0x00FE990138 (CORESIGHT_SOC_CTI_0) 0x00FE9A0138 (CORESIGHT_SOC_CTI_1) 0x00FE9B0138 (CORESIGHT_SOC_CTI_2) |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x00000000 |
| Description | The CTI Channel In Status Register provides the status of the ctichin inputs. |
CTICHINSTATUS (CTI) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| CTICHINSTATUS | 3:0 | roRead-only | 0 | Shows the status of the ctichin inputs.1 = ctichin is active. 0 = ctichin is inactive.Because the register provides a view of the raw ctichin inputs, the reset value is unknown. There is one bit of the field for each channel input. |