CTIGATE (A53_CTI_2) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

CTIGATE (A53_CTI_2) Register Description

Register NameCTIGATE
Offset Address0x0000000140
Absolute Address 0x00FEE20140 (CORESIGHT_A53_CTI_2)
Width32
TyperwNormal read/write
Reset Value0x0000000F
DescriptionThe Gate Enable Register prevents the channels from propagating through the CTM to other CTIs. This enables local cross-triggering, for example for causing an interrupt when the ETM trigger occurs. It can be used effectively with CTIAPPSET, CTIAPPCLEAR, and CTIAPPPULSE for asserting trigger outputs by asserting channels, without affecting the rest of the system. On reset, this register is 0xF, and channel propagation is enabled.

CTIGATE (A53_CTI_2) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
CTIGATEEN 3:0rwNormal read/write0xFEnable CTICHOUT3-0 respectively. Set to 0 to disable channel propagation.