Control_Override_Register (CCI400) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

Control_Override_Register (CCI400) Register Description

Register NameControl_Override_Register
Offset Address0x0000000000
Absolute Address 0x00FD6E0000 (CCI_GPV)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionControl_Override_Register

Control_Override_Register (CCI400) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Disable_Retry_Reduction_Buffers 5rwNormal read/write0x0disable the retry reduction buffers in all master interfaces
Disable_Priority_Promotion 4rwNormal read/write0x0ARQOSARBS inputs are ignored
Terminate_Barriers 3rwNormal read/write0x0all master interfaces terminate barriers
Disable_Speculative_Fetches 2rwNormal read/write0x0disable speculative fetches from all master interfaces
DVM_Message_Disable 1rwNormal read/write0x0disable propagation of all DVM messages
Snoop_Disable 0rwNormal read/write0x0disable all snoops (not DVM messages)