Cycle_Counter_Control (CCI400) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

Cycle_Counter_Control (CCI400) Register Description

Register NameCycle_Counter_Control
Offset Address0x0000009008
Absolute Address 0x00FD6E9008 (CCI_GPV)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionCycle_Counter_Control

Cycle_Counter_Control (CCI400) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
CCNT_EN 0rwNormal read/write0x0Enable clock cycle counter