DBGDTRRX_EL0 (A53_DBG_1) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

DBGDTRRX_EL0 (A53_DBG_1) Register Description

Register NameDBGDTRRX_EL0
Offset Address0x0000000080
Absolute Address 0x00FED10080 (CORESIGHT_A53_DBG_1)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionDebug Data Transfer Register Receive

DBGDTRRX_EL0 (A53_DBG_1) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
DBGDTRRX_EL031:0rwNormal read/write0Update DTRRX. Writes to this register update the value in DTRRX and set RXfull to 1.Reads of this register return the last value written to DTRRX and do not change RXfull.