DDRC_QVN_CTRL (DDR_QOS_CTRL) Register Description
| Register Name | DDRC_QVN_CTRL |
|---|---|
| Offset Address | 0x0000000514 |
| Absolute Address | 0x00FD090514 (DDR_QOS_CTRL) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x0000003C |
| Description | DDRC QVN Control register |
DDRC_QVN_CTRL (DDR_QOS_CTRL) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:6 | razRead as zero | 0x0 | Reserved for future use |
| PREALLOC_P2 | 5:4 | rwNormal read/write | 0x3 | Token Preallocation for DDR_SS Slave Port 2 (VN0 and VN1) |
| PREALLOC_P1 | 3:2 | rwNormal read/write | 0x3 | Token Preallocation for DDR_SS Slave Port 1 (VN0 and VN1) |
| EN_P2 | 1 | rwNormal read/write | 0x0 | QVN Enable for DDR_SS Slave Port 2 |
| EN_P1 | 0 | rwNormal read/write | 0x0 | QVN Enable for DDR_SS Slave Port 1 |