DEVID (ETF4K) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

DEVID (ETF4K) Register Description

Register NameDEVID
Offset Address0x0000000FC8
Absolute Address 0x00FE940FC8 (CORESIGHT_SOC_ETF_1)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionThis register indicates the capabilities of the CoreSight TMC.

DEVID (ETF4K) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
MEMWIDTH10:8roRead-only0x0This value indicates the width of the Memory interface databus. For the ETB and ETF configurations, this value is twice the ATB datawidth. In these configurations, the default value of MEMWIDTH is 64_bits corresponding to the default ATB datawidth of 32_bits. For the ETR configuration, the MEMWIDTH is the same as the ATB datawidth, the default value being 32_bits.
CONFIGTYPE 7:6roRead-only0x0This value indicates TMC configuration type - ETB, ETF or ETR configuration.
CLKSCHEME 5roRead-only0x0This value indicates the TMC RAM clocking scheme used ie. whether the TMC RAM operates synchronously or asynchronously to CLK.
ATBINPORTCOUNT 4:0roRead-only0x0This value indicates the type/number of ATB multiplexing present on the input ATB. Currently only 0x00 is supported (no multiplexing present). This value is used to assist topology detection of the ATB structure.