DEVID (TPIU) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

DEVID (TPIU) Register Description

Register NameDEVID
Offset Address0x0000000FC8
Absolute Address 0x00FE980FC8 (CORESIGHT_SOC_TPIU)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionThis register indicates the capabilities of the TPIU.

DEVID (TPIU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
SWOUARTNRZ11roRead-only0x0Indicates whether Serial Wire Output (UART/NRZ) is supported.
SWOMAN10roRead-only0x0Indicates whether Serial Wire Output (Manchester) is supported.
TCLKDATA 9roRead-only0x0Indicates whether trace clock + data is supported.
FIFOSIZE 8:6roRead-only0x0FIFO size in powers of 2.
CLKRELAT 5roRead-only0x0Indicates the relationship between atclk and traceclkin.
MUXNUM 4:0roRead-only0x0Indicates the Hidden Level of Input multiplexing. When nonzero this value indicates the type/number of ATB multiplexing present on the input to the ATB. Currently only 0x00 is supported, that is, no multiplexing present.This value is used to assist topology detection of the ATB structure.