DFIUPD2 (DDRC) Register Description
Register Name | DFIUPD2 |
---|---|
Offset Address | 0x00000001A8 |
Absolute Address | 0x00FD0701A8 (DDRC) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x80000000 |
Description | DFI Update Register 2 |
This register is static. Static registers can only be written when the controller is in reset.
DFIUPD2 (DDRC) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
dfi_phyupd_en | 31 | rwNormal read/write | 0x1 | Enables the support for acknowledging PHY-initiated updates: - 0 - Disabled - 1 - Enabled |