DMAIDR (STM) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

DMAIDR (STM) Register Description

Register NameDMAIDR
Offset Address0x0000000CFC
Absolute Address 0x00FE9C0CFC (CORESIGHT_SOC_STM)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionDMA features of the STM (read-only).

DMAIDR (STM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
VENDSPEC11:8roRead-only0x0The VENDSPEC field identifies any vendor specific modifications or mappings.
Reads back a 0.
CLASSREV 7:4roRead-only0x0The CLASSREV field identifies the revision of the programmers model.
Reads back a 0.
CLASS 3:0roRead-only0x0The CLASS field identifies the programmers model.
This reads back a 2: Control class.