DMASTARTR (STM) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

DMASTARTR (STM) Register Description

Register NameDMASTARTR
Offset Address0x0000000C04
Absolute Address 0x00FE9C0C04 (CORESIGHT_SOC_STM)
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionStart DMA Transfer.

This write-only register is used to start a DMA transfer. A write of one when the DMA peripheral request interface is idle starts a DMA transfer. A write of zero has no effect. A write of one when the DMA peripheral request interface is active has no effect.

DMASTARTR (STM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
START 0woWrite-only0Start a DMA transfer:
0: ignored.
1: start transfer.