DMASTATR (STM) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

DMASTATR (STM) Register Description

Register NameDMASTATR
Offset Address0x0000000C0C
Absolute Address 0x00FE9C0C0C (CORESIGHT_SOC_STM)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionDMA Transfer Status.

This read-only register is used to determine the status of the DMA peripheral request interface.

DMASTATR (STM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
STATUS 0roRead-only0x0Stop an active DMA transfer