DMA_CHANNEL_SCRATCH1 (AXIPCIE_DMA) Register Description
| Register Name | DMA_CHANNEL_SCRATCH1 |
|---|---|
| Offset Address | 0x0000000054 |
| Absolute Address |
0x00FD0F0054 (AXIPCIE_DMA0) 0x00FD0F00D4 (AXIPCIE_DMA1) 0x00FD0F0154 (AXIPCIE_DMA2) 0x00FD0F01D4 (AXIPCIE_DMA3) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Scratchpad Register |
DMA_CHANNEL_SCRATCH1 (AXIPCIE_DMA) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| scratch1 | 31:0 | rwNormal read/write | 0x0 | Scratchpad Register. Intended to enable information to be passed between sofwtare. For example, applications with both an AXI CPU and an PCIe CPU may use this register to pass information between CPUs. The DMA Channel implementation does not use or alter this information. |