DMA_CHANNEL_SRC_Q_PTR_HI (AXIPCIE_DMA) Register Description
| Register Name | DMA_CHANNEL_SRC_Q_PTR_HI |
|---|---|
| Offset Address | 0x0000000004 |
| Absolute Address |
0x00FD0F0004 (AXIPCIE_DMA0) 0x00FD0F0084 (AXIPCIE_DMA1) 0x00FD0F0104 (AXIPCIE_DMA2) 0x00FD0F0184 (AXIPCIE_DMA3) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Queue Base Address High |
DMA_CHANNEL_SRC_Q_PTR_HI (AXIPCIE_DMA) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| start_addr_hi | 31:0 | rwNormal read/write | 0x0 | Queue Base Address[63:32]. Must be set to 0x0 if the Queue is located in 32-bit address space. |