DPDMA_IMR (DPDMA) Register Description
| Register Name | DPDMA_IMR |
|---|---|
| Offset Address | 0x0000000008 |
| Absolute Address | 0x00FD4C0008 (DPDMA) |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x0FFFFFFF |
| Description | Interrupt Mask Register for intrN. This is a read-only location and can be atomically altered by either the IDR or the IER. |
DPDMA_IMR (DPDMA) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| vsync_int | 27 | roRead-only | 0x1 | Interrupt on Vsync |
| axi_rd_4k_cross | 26 | roRead-only | 0x1 | AXI Read Channel burst crosses 4k boundary |
| wr_data_fifo_full | 25 | roRead-only | 0x1 | Write data FIFO full condition is detected during descriptor update |
| wr_cmd_fifo_full | 24 | roRead-only | 0x1 | Write cmd FIFO full condition is detected during descriptor update |
| dscr_err5 | 23 | roRead-only | 0x1 | DP is requesting for data (brdy), descriptor is not valid on current channel |
| dscr_err4 | 22 | roRead-only | 0x1 | DP is requesting for data (brdy), descriptor is not valid on current channel |
| dscr_err3 | 21 | roRead-only | 0x1 | DP is requesting for data (brdy), descriptor is not valid on current channel |
| dscr_err2 | 20 | roRead-only | 0x1 | DP is requesting for data (brdy), descriptor is not valid on current channel |
| dscr_err1 | 19 | roRead-only | 0x1 | DP is requesting for data (brdy), descriptor is not valid on current channel |
| dscr_err0 | 18 | roRead-only | 0x1 | DP is requesting for data (brdy), descriptor is not valid on current channel |
| data_axi_err5 | 17 | roRead-only | 0x1 | Error occurred during data read on Channel 5 - SLAVE/DECODE Error on any beat of data |
| data_axi_err4 | 16 | roRead-only | 0x1 | Error occurred during data read on Channel 4 - SLAVE/DECODE Error on any beat of data |
| data_axi_err3 | 15 | roRead-only | 0x1 | Error occurred during data read on Channel 3 - SLAVE/DECODE Error on any beat of data |
| data_axi_err2 | 14 | roRead-only | 0x1 | Error occurred during data read on Channel 2 - SLAVE/DECODE Error on any beat of data |
| data_axi_err1 | 13 | roRead-only | 0x1 | Error occurred during data read on Channel 1 - SLAVE/DECODE Error on any beat of data |
| data_axi_err0 | 12 | roRead-only | 0x1 | Error occurred during data read on Channel 0 - SLAVE/DECODE Error on any beat of data |
| no_ostand_tran5 | 11 | roRead-only | 0x1 | outstanding transaction counter reached zero during pause on channel 5 |
| no_ostand_tran4 | 10 | roRead-only | 0x1 | outstanding transaction counter reached zero during pause on channel 4 |
| no_ostand_tran3 | 9 | roRead-only | 0x1 | outstanding transaction counter reached zero during pause on channel 3 |
| no_ostand_tran2 | 8 | roRead-only | 0x1 | outstanding transaction counter reached zero during pause on channel 2 |
| no_ostand_tran1 | 7 | roRead-only | 0x1 | outstanding transaction counter reached zero during pause on channel 1 |
| no_ostand_tran0 | 6 | roRead-only | 0x1 | outstanding transaction counter reached zero during pause on channel 0 |
| dscr_done5 | 5 | roRead-only | 0x1 | DMA is done with current descriptor, interrupt is only generated if it is enabled in current descriptor |
| dscr_done4 | 4 | roRead-only | 0x1 | DMA is done with current descriptor, interrupt is only generated if it is enabled in current descriptor |
| dscr_done3 | 3 | roRead-only | 0x1 | DMA is done with current descriptor, interrupt is only generated if it is enabled in current descriptor |
| dscr_done2 | 2 | roRead-only | 0x1 | DMA is done with current descriptor, interrupt is only generated if it is enabled in current descriptor |
| dscr_done1 | 1 | roRead-only | 0x1 | DMA is done with current descriptor, interrupt is only generated if it is enabled in current descriptor |
| dscr_done0 | 0 | roRead-only | 0x1 | DMA is done with current descriptor, interrupt is only generated if it is enabled in current descriptor |