DP_AUX_REPLY_DATA (DISPLAY_PORT) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

DP_AUX_REPLY_DATA (DISPLAY_PORT) Register Description

Register NameDP_AUX_REPLY_DATA
Offset Address0x0000000134
Absolute Address 0x00FD4A0134 (DISPLAY_PORT)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionMaps to the internal FIFO which contains up to 16 bytes of information received during the AUX channel reply. Reply data is read from the FIFO starting with byte 0. The number of bytes in the FIFO corresponds to the number of bytes requested.

DP_AUX_REPLY_DATA (DISPLAY_PORT) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:8razRead as zero0x0
AUX_REPLY_DATA 7:0roRead-only0x0AUX reply data