DP_DOWNSPREAD_CTRL (DISPLAY_PORT) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

DP_DOWNSPREAD_CTRL (DISPLAY_PORT) Register Description

Register NameDP_DOWNSPREAD_CTRL
Offset Address0x0000000018
Absolute Address 0x00FD4A0018 (DISPLAY_PORT)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionFor down-spreading control

DP_DOWNSPREAD_CTRL (DISPLAY_PORT) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:1razRead as zero0x0
DWNSPRD_CTL 0rwNormal read/write0x0Down-spreading control
- [0] -Set to 1 to enable a 0.5% spreading of the clock or 0 for none.