DP_FORCE_SCRAMBLER_RESET (DISPLAY_PORT) Register Description
Register Name | DP_FORCE_SCRAMBLER_RESET |
---|---|
Offset Address | 0x00000000C0 |
Absolute Address | 0x00FD4A00C0 (DISPLAY_PORT) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00000000 |
Description | Reads from this register always return 0x0. |
DP_FORCE_SCRAMBLER_RESET (DISPLAY_PORT) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:1 | razRead as zero | 0x0 | |
FORCE_SCR_RESET | 0 | woWrite-only | 0x0 | 1 forces a scrambler reset. |