DP_FRAC_BYTES_PER_TU (DISPLAY_PORT) Register Description
| Register Name | DP_FRAC_BYTES_PER_TU |
|---|---|
| Offset Address | 0x00000001C8 |
| Absolute Address | 0x00FD4A01C8 (DISPLAY_PORT) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Calculating MIN bytes per TU will often not be a whole number.This register is used to hold the fractional component |
DP_FRAC_BYTES_PER_TU (DISPLAY_PORT) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:10 | razRead as zero | 0x0 | |
| FRACT_BYTES_PER_TU | 9:0 | rwNormal read/write | 0x0 | The fraction part of ((VIDEO_BW/LINK_BW)*TRANSFER_UNIT_SIZE) scaled by 1000 is programmed in this register. |