DP_INTERRUPT_SIGNAL_STATE (DISPLAY_PORT) Register Description
| Register Name | DP_INTERRUPT_SIGNAL_STATE |
|---|---|
| Offset Address | 0x0000000130 |
| Absolute Address | 0x00FD4A0130 (DISPLAY_PORT) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Contains the raw signal values for those conditions which may cause an interrupt. |
DP_INTERRUPT_SIGNAL_STATE (DISPLAY_PORT) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:4 | razRead as zero | 0x0 | |
| REPLY_TIMEOUT | 3 | roRead-only | 0x0 | A 1 indicates that a reply timeout has occurred. |
| REPLY_STATE | 2 | roRead-only | 0x0 | A1 indicates that a reply is currently being received. |
| REQUEST_STATE | 1 | roRead-only | 0x0 | A1 indicates that a request is currently being sent. |
| HPD_STATE | 0 | roRead-only | 0x0 | Contains the raw state of the HPD pin on the DisplayPort connector. |