Field Name | Bits | Type | Reset Value | Description |
VSYNC_TS | 31 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
EXT_VSYNC_TS | 30 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
CUST_TS | 29 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
CUST_TS_2 | 28 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
CHBUF0_OVERFLW | 27 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
CHBUF1_OVERFLW | 26 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
CHBUF2_OVERFLW | 25 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
CHBUF3_OVERFLW | 24 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
CHBUF4_OVERFLW | 23 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
CHBUF5_OVERFLW | 22 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
CHBUF0_UNDERFLW | 21 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
CHBUF1_UNDERFLW | 20 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
CHBUF2_UNDERFLW | 19 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
CHBUF3_UNDERFLW | 18 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
CHBUF4_UNDERFLW | 17 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
CHBUF5_UNDERFLW | 16 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
PIXEL0_MATCH | 15 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
PIXEL1_MATCH | 14 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
VBLNK_START | 13 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
LIV_AUDBUF_UNDRFLW | 12 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
Reserved | 11:6 | razRead as zero | 0x0 | |
EXT_PKT_TXD | 5 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
HPD_PULSE_DET | 4 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
REPLY_TIMEOUT | 3 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
REPLY_RECEIVED | 2 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
HPD_EVENT | 1 | roRead-only | 0x1 | See DP_INT_STATUS register for description |
HPD_IRQ | 0 | roRead-only | 0x1 | See DP_INT_STATUS register for description |