DP_INT_MASK (DISPLAY_PORT) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

DP_INT_MASK (DISPLAY_PORT) Register Description

Register NameDP_INT_MASK
Offset Address0x00000003A4
Absolute Address 0x00FD4A03A4 (DISPLAY_PORT)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0xFFFFF03F
DescriptionInterrupt Mask Register for intrN. This is a read-only location and can be atomically altered by either the IDR or the IER.

DP_INT_MASK (DISPLAY_PORT) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
VSYNC_TS31roRead-only0x1See DP_INT_STATUS register for description
EXT_VSYNC_TS30roRead-only0x1See DP_INT_STATUS register for description
CUST_TS29roRead-only0x1See DP_INT_STATUS register for description
CUST_TS_228roRead-only0x1See DP_INT_STATUS register for description
CHBUF0_OVERFLW27roRead-only0x1See DP_INT_STATUS register for description
CHBUF1_OVERFLW26roRead-only0x1See DP_INT_STATUS register for description
CHBUF2_OVERFLW25roRead-only0x1See DP_INT_STATUS register for description
CHBUF3_OVERFLW24roRead-only0x1See DP_INT_STATUS register for description
CHBUF4_OVERFLW23roRead-only0x1See DP_INT_STATUS register for description
CHBUF5_OVERFLW22roRead-only0x1See DP_INT_STATUS register for description
CHBUF0_UNDERFLW21roRead-only0x1See DP_INT_STATUS register for description
CHBUF1_UNDERFLW20roRead-only0x1See DP_INT_STATUS register for description
CHBUF2_UNDERFLW19roRead-only0x1See DP_INT_STATUS register for description
CHBUF3_UNDERFLW18roRead-only0x1See DP_INT_STATUS register for description
CHBUF4_UNDERFLW17roRead-only0x1See DP_INT_STATUS register for description
CHBUF5_UNDERFLW16roRead-only0x1See DP_INT_STATUS register for description
PIXEL0_MATCH15roRead-only0x1See DP_INT_STATUS register for description
PIXEL1_MATCH14roRead-only0x1See DP_INT_STATUS register for description
VBLNK_START13roRead-only0x1See DP_INT_STATUS register for description
LIV_AUDBUF_UNDRFLW12roRead-only0x1See DP_INT_STATUS register for description
Reserved11:6razRead as zero0x0
EXT_PKT_TXD 5roRead-only0x1See DP_INT_STATUS register for description
HPD_PULSE_DET 4roRead-only0x1See DP_INT_STATUS register for description
REPLY_TIMEOUT 3roRead-only0x1See DP_INT_STATUS register for description
REPLY_RECEIVED 2roRead-only0x1See DP_INT_STATUS register for description
HPD_EVENT 1roRead-only0x1See DP_INT_STATUS register for description
HPD_IRQ 0roRead-only0x1See DP_INT_STATUS register for description