DP_MAIN_STREAM_HSTART (DISPLAY_PORT) Register Description
| Register Name | DP_MAIN_STREAM_HSTART |
|---|---|
| Offset Address | 0x000000019C |
| Absolute Address | 0x00FD4A019C (DISPLAY_PORT) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Number of clocks between the leading edge of the horizontal sync and the start of active data |
DP_MAIN_STREAM_HSTART (DISPLAY_PORT) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:16 | razRead as zero | 0x0 | |
| HSTART | 15:0 | rwNormal read/write | 0x0 | Horizontal start clock count. |