DP_SCRAMBLING_DISABLE (DISPLAY_PORT) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

DP_SCRAMBLING_DISABLE (DISPLAY_PORT) Register Description

Register NameDP_SCRAMBLING_DISABLE
Offset Address0x0000000014
Absolute Address 0x00FD4A0014 (DISPLAY_PORT)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionDP_SCRAMBLING_DISABLE

DP_SCRAMBLING_DISABLE (DISPLAY_PORT) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:1razRead as zero0x0
SCR_DIS 0rwNormal read/write0x0Set to 1 when the transmitter has disabled the scrambler and transmits all symbols.
[0] - Disable scrambling.