DP_SOFTWARE_RESET (DISPLAY_PORT) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

DP_SOFTWARE_RESET (DISPLAY_PORT) Register Description

Register NameDP_SOFTWARE_RESET
Offset Address0x000000001C
Absolute Address 0x00FD4A001C (DISPLAY_PORT)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionSoft reset of DP Core

DP_SOFTWARE_RESET (DISPLAY_PORT) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:1razRead as zero0x0
SOFT_RST 0woWrite-only0x0Reads will return zeros.
[0] - Soft Video Reset: When set, video logic will be reset (stream 1). Software need NOT update this bit to 0for deassertion of reset