DP_USER_PIX_WIDTH (DISPLAY_PORT) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

DP_USER_PIX_WIDTH (DISPLAY_PORT) Register Description

Register NameDP_USER_PIX_WIDTH
Offset Address0x00000001B8
Absolute Address 0x00FD4A01B8 (DISPLAY_PORT)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000001
DescriptionUser pixel width size

DP_USER_PIX_WIDTH (DISPLAY_PORT) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:2razRead as zero0x0
PIX_WIDTH 1:0roRead-only0x1DP Tx core is used in single pixel mode. This may be used in driver to maintain compatibility with soft IP