DTDR0 (DDR_PHY) Register Description
| Register Name | DTDR0 |
|---|---|
| Offset Address | 0x0000000218 |
| Absolute Address | 0x00FD080218 (DDR_PHY) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0xDD22EE11 |
| Description | Data Training Data Register 0 |
DTDR0 (DDR_PHY) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| DTBYTE3 | 31:24 | rwNormal read/write | 0xDD | Data Training Data |
| DTBYTE2 | 23:16 | rwNormal read/write | 0x22 | Data Training Data |
| DTBYTE1 | 15:8 | rwNormal read/write | 0xEE | Data Training Data |
| DTBYTE0 | 7:0 | rwNormal read/write | 0x11 | Data Training Data: The first 4 bytes of data used during data training. This same data byte is used for each Byte Lane. Default sequence is a walking 1 while toggling data every data cycle. |