DTDR1 (DDR_PHY) Register Description
Register Name | DTDR1 |
---|---|
Offset Address | 0x000000021C |
Absolute Address | 0x00FD08021C (DDR_PHY) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x7788BB44 |
Description | Data Training Data Register 1 |
DTDR1 (DDR_PHY) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
DTBYTE7 | 31:24 | rwNormal read/write | 0x77 | Data Training Data |
DTBYTE6 | 23:16 | rwNormal read/write | 0x88 | Data Training Data |
DTBYTE5 | 15:8 | rwNormal read/write | 0xBB | Data Training Data |
DTBYTE4 | 7:0 | rwNormal read/write | 0x44 | Data Training Data: The second 4 bytes of data used during data training. This same data byte is used for each Byte Lane. Default sequence is a walking 1 while toggling data every data cycle. |