DTPR6 (DDR_PHY) Register Description
Register Name | DTPR6 |
---|---|
Offset Address | 0x0000000128 |
Absolute Address | 0x00FD080128 (DDR_PHY) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00000505 |
Description | DRAM Timing Parameters Register 6 |
DTPR6 (DDR_PHY) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
PUBWLEN | 31 | rwNormal read/write | 0x0 | PUB Write Latency Enable: Specifies, if set, that the PUB should use the write latency specified in DTPR6.PUBWL. Otherwise, if not set, the PUB write latency is automatically calculated from the mode register settings. |
PUBRLEN | 30 | rwNormal read/write | 0x0 | PUB Read Latency Enable: Specifies, if set, that the PUB should use the read latency specified in DTPR6.PUBRL. Otherwise, if not set, the PUB read latency is automatically calculated from the mode register settings. |
Reserved | 29:14 | roRead-only | 0x0 | Return zeroes on reads. |
PUBWL | 13:8 | rwNormal read/write | 0x5 | Write Latency: Specifies the write latency that should be used inside the PUB when DTPTR6.PUBWL is set to 1. Valid values are 1 to 31. If PUBWLEN is not set, then the PUB write latency is automatically calculated from the mode register settings. |
Reserved | 7:6 | roRead-only | 0x0 | Return zeroes on reads. |
PUBRL | 5:0 | rwNormal read/write | 0x5 | Read Latency: Specifies the read latency that should be used inside the PUB when DTPTR6.PUBRLEN is set to 1. Valid values are 1 to 31. If PUBRL is not set, then the PUB read latency is automatically calculated from the mode register settings. |