DTRTXext (R5_DBG_0) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

DTRTXext (R5_DBG_0) Register Description

Register NameDTRTXext
Offset Address0x000000008C
Absolute Address 0x00FEBF008C (CORESIGHT_R5_DBG_0)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionWrite Data Transfer Register

DTRTXext (R5_DBG_0) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Data31:0rwNormal read/write0Writes the Data Transfer Register. This is write-only for the CP14 interface.
Note:
Writes to the DTRTXint through the coprocessor interface cause the RXfull flag to be set.
However, writes to the DTRTXext through the APB port do not affect this flag.