DX1RSR1 (DDR_PHY) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

DX1RSR1 (DDR_PHY) Register Description

Register NameDX1RSR1
Offset Address0x00000008D4
Absolute Address 0x00FD0808D4 (DDR_PHY)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionDATX8 n Rank Status Register 1

DX1RSR1 (DDR_PHY) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:16roRead-only0x0Reserved. Return zeroes on reads.
RDLVLERR15:0roRead-only0x0Read Leveling Error: Indicates, if set, that there is an error in read
leveling training of the byte in x8 mode
One bit for each of the up to 2 ranks.