DX8SL4PLLCR2 (DDR_PHY) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

DX8SL4PLLCR2 (DDR_PHY) Register Description

Register NameDX8SL4PLLCR2
Offset Address0x000000150C
Absolute Address 0x00FD08150C (DDR_PHY)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionDAXT8 0-1 PLL Control Register 2 (Type B PLL Only)

DX8SL4PLLCR2 (DDR_PHY) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
PLLCTRL_31_031:0rwNormal read/write0x0Connects to bits [31:0] of the PLL general control bus PLL_CTRL