Field Name | Bits | Type | Reset Value | Description |
Reserved | 31:30 | woWrite-only | 0 | Reserved. Return zeroes on reads. |
GATEDXRDCLK | 29:28 | woWrite-only | 0 | Enable Clock Gating for DX ddr_clk |
GATEDXDDRCLK | 27:26 | woWrite-only | 0 | Enable Clock Gating for DX ctl_rd_clk |
GATEDXCTLCLK | 25:24 | woWrite-only | 0 | Enable Clock Gating for DX ctl_clk |
CLKLEVEL | 23:22 | woWrite-only | 0 | Selects the level to which clocks will be stalled when clock gating is enabled. |
LBMODE | 21 | woWrite-only | 0 | Loopback Mode |
LBGSDQS | 20 | woWrite-only | 0 | Load GSDQS LCDL with 2x the calibrated GSDQSPRD value |
LBGDQS | 19:18 | woWrite-only | 0 | Loopback DQS Gating |
LBDQSS | 17 | woWrite-only | 0 | Loopback DQS Shift |
PHYHRST | 16 | woWrite-only | 0 | PHY High-Speed Reset |
PHYFRST | 15 | woWrite-only | 0 | PHY FIFO Reset |
DLTST | 14 | woWrite-only | 0 | Delay Line Test Start |
DLTMODE | 13 | woWrite-only | 0 | Delay Line Test Mode |
Reserved | 12:11 | woWrite-only | 0 | Reserved. Caution, do not write to this register field. |
OSCWDDL | 10:9 | woWrite-only | 0 | Oscillator Mode Write-Data Delay Line Select |
Reserved | 8:7 | woWrite-only | 0 | Reserved. Caution, do not write to this register field. |
OSCWDL | 6:5 | woWrite-only | 0 | Oscillator Mode Write-Leveling Delay Line Select |
OSCDIV | 4:1 | woWrite-only | 0 | Oscillator Mode Division |
OSCEN | 0 | woWrite-only | 0 | Oscillator Enable |