DX8SLbPLLCR5 (DDR_PHY) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

DX8SLbPLLCR5 (DDR_PHY) Register Description

Register NameDX8SLbPLLCR5
Offset Address0x00000017D8
Absolute Address 0x00FD0817D8 (DDR_PHY)
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionDAXT8 0-8 PLL Control Register 5 (Type B PLL Only)

DX8SLbPLLCR5 (DDR_PHY) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:8woWrite-only0Reserved. Return zeroes on reads.
PLLCTRL_103_96 7:0woWrite-only0Connects to bits [103:96] of the PLL general control bus PLL_CTRL