ECCBITMASK1 (DDRC) Register Description
Register Name | ECCBITMASK1 |
---|---|
Offset Address | 0x000000009C |
Absolute Address | 0x00FD07009C (DDRC) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000000 |
Description | ECC Corrected Data Bit Mask Register 1 |
ECCBITMASK1 (DDRC) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
ecc_corr_bit_mask_63_32 | 31:0 | roRead-only | 0x0 | Mask for the corrected data portion - 1 on any bit indicates that the bit has been corrected by the ECC logic - 0 on any bit indicates that the bit has not been corrected by the ECC logic This register accumulates data over multiple ECC errors, to give an overall indication of which bits are being fixed. It is cleared by writing a 1 to ECCCLR.ecc_clr_corr_err. For 32-bit ECC, this register is not used. |