ECCCFG0 (DDRC) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

ECCCFG0 (DDRC) Register Description

Register NameECCCFG0
Offset Address0x0000000070
Absolute Address 0x00FD070070 (DDRC)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionECC Configuration Register 0

This register is static. Static registers can only be written when the controller is in reset.

ECCCFG0 (DDRC) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
dis_scrub 4rwNormal read/write0x0Disable ECC scrubs. Valid only when ECCCFG0.ecc_mode = 3b100
ecc_mode 2:0rwNormal read/write0x0ECC mode indicator
- 000 - ECC disabled
- 100 - ECC enabled - SEC/DED over 1 beat
- all other settings are reserved for future use