ECCCLR (DDRC) Register Description
| Register Name | ECCCLR |
|---|---|
| Offset Address | 0x000000007C |
| Absolute Address | 0x00FD07007C (DDRC) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | ECC Clear Register |
This register is dynamic. Dynamic registers can be written at any time during operation.
ECCCLR (DDRC) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| ecc_clr_uncorr_err_cnt | 3 | wtcReadable, write a 1 to clear | 0x0 | Setting this register bit to 1 clears the currently stored uncorrected ECC error count. The ECCSTAT.ecc_uncorr_err_cnt register is cleared by this operation. When the clear operation is complete, the DDRC automatically clears this bit. |
| ecc_clr_corr_err_cnt | 2 | wtcReadable, write a 1 to clear | 0x0 | Setting this register bit to 1 clears the currently stored corrected ECC error count. The ECCERRCNT.ecc_corr_err_cnt register is cleared by this operation. When the clear operation is complete, the DDRC automatically clears this bit. |
| ecc_clr_uncorr_err | 1 | rwNormal read/write | 0x0 | Setting this register bit to 1 clears the currently starred corrected ECC error.The ECCSTAT.ecc corrected err, ADVECCSTAT.advecc_corrected_err, ADVECCSTAT.advecc_num_err_symbol, ADVECCSTAT.advecc_err_symbol_pos, ADVECCSTAT.advecc_err_symbol_bits,ECCCSYNO,ECCCSYN1,ECCCSYN2, ECCBITMASKO,ECCBITMASK1 and ECCBITMASK2 registers are cleared by this operation. uMCTL2 automatically clears this bit. Value After Reset: OxO Exists: MEMC_ECC_SUPPORT>O Testable: readOnly Progrmming Mode:Dynamic Access Type: rw1c |
| ecc_clr_corr_err | 0 | rwNormal read/write | 0x0 | Setting this register bit to 1 clears the currently starred corrected ECC error.The ECCSTAT.ecc corrected err, ADVECCSTAT.advecc_corrected_err, ADVECCSTAT.advecc_num_err_symbol, ADVECCSTAT.advecc_err_symbol_pos, ADVECCSTAT.advecc_err_symbol_bits,ECCCSYNO,ECCCSYN1,ECCCSYN2, ECCBITMASKO,ECCBITMASK1 and ECCBITMASK2 registers are cleared by this operation. uMCTL2 automatically clears this bit. Value After Reset: OxO Exists: MEMC_ECC_SUPPORT>O Testable: readOnly Progrmming Mode:Dynamic Access Type: rw1c |