ECCPOISONADDR0 (DDRC) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

ECCPOISONADDR0 (DDRC) Register Description

Register NameECCPOISONADDR0
Offset Address0x00000000B8
Absolute Address 0x00FD0700B8 (DDRC)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionECC Data Poisoning Address Register 0.
If a write transaction matches the address specified in this register, an ECC error will be introduced on that transaction, if ECCCFG1.data_poison_en=1

This register is static. Static registers can only be written when the controller is in reset.

ECCPOISONADDR0 (DDRC) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
ecc_poison_rank24rwNormal read/write0x0Rank address for ECC poisoning
ecc_poison_col11:0rwNormal read/write0x0Column address for ECC poisoning. Note that this column address must be burst aligned:
- In full bus width mode, ecc_poison_col[2:0] must be set to 0
- In half bus width mode, ecc_poison_col[3:0] must be set to 0