EDPCSR_63to32 (A53_DBG_3) Register Description
Register Name | EDPCSR_63to32 |
---|---|
Offset Address | 0x00000000AC |
Absolute Address | 0x00FEF100AC (CORESIGHT_A53_DBG_3) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000000 |
Description | External Debug Program Counter Sample Register (high word) |
EDPCSR_63to32 (A53_DBG_3) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
EDPCSR_63to32 | 31:0 | roRead-only | 0 | PC Sample high word, EDPCSRhi. If EDVIDSR.HV == 0 then this field is RAZ, otherwise bits [63:32] of the sampled PC. |