ERR_ATB_ISR (FPD_SLCR) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

ERR_ATB_ISR (FPD_SLCR) Register Description

Register NameERR_ATB_ISR
Offset Address0x0000006000
Absolute Address 0x00FD616000 (FPD_SLCR)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionInterrupt Status.

This is a sticky register that holds the value of the interrupt until cleared. Read: 0: not set. 1: set. Write: 0: ignored. 1: cleared.

ERR_ATB_ISR (FPD_SLCR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:3razRead as zero0x0reserved
afifs1 2wtcReadable, write a 1 to clear0x0ATB instance 5: FPD Main Switch to M_AXI_HPM1_FPD inteface.
afifs0 1wtcReadable, write a 1 to clear0x0ATB instance 4: FPD Main Switch to M_AXI_HPM0_FPD inteface.
fpds 0wtcReadable, write a 1 to clear0x0ATB instance 3: FPD Main Switch to SIOU slaves.