ESR (CAN) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

ESR (CAN) Register Description

Register NameESR
Offset Address0x0000000014
Absolute Address 0x00FF060014 (CAN0)
0x00FF070014 (CAN1)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionError Status

The Error Status Register (ESR) indicates the type of error that has occurred on the bus. If more than one error occurs, all relevant error flag bits are set in this register. The ESR is a write-to-clear register. Writes to this register will not set any bits, but will clear the bits that are set.

ESR (CAN) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:5rwNormal read/write0x0Reserved
ACKER 4wtcReadable, write a 1 to clear0x0ACK Error
Indicates an acknowledgment error.
1: Indicates an acknowledgment error has occurred.
0: Indicates an acknowledgment error has not occurred on the bus since the last write to this register.
If this bit is set, writing a 1 clears it.
BERR 3wtcReadable, write a 1 to clear0x0Bit Error
Indicates the received bit is not the same as the transmitted bit during bus communication.
1: Indicates a bit error has occurred.
0: Indicates a bit error has not occurred on the bus since the last write to this register.
If this bit is set, writing a 1 clears it.
STER 2wtcReadable, write a 1 to clear0x0Stuff Error
Indicates an error if there is a stuffing violation.
1: Indicates a stuff error has occurred.
0: Indicates a stuff error has not occurred on the bus since the last write to this register.
If this bit is set, writing a 1 clears it.
FMER 1wtcReadable, write a 1 to clear0x0Form Error
Indicates an error in one of the fixed form fields in the message frame.
1: Indicates a form error has occurred.
0: Indicates a form error has not occurred on the bus since the last write to this register.
If this bit is set, writing a 1 clears it.
CRCER 0wtcReadable, write a 1 to clear0x0CRC Error
Indicates a CRC error has occurred.
1: Indicates a CRC error has occurred.
0: Indicates a CRC error has not occurred on the
bus since the last write to this register.
If this bit is set, writing a 1 clears it.
In case of a CRC Error and a CRC delimiter corruption, only the FMER bit is set.