ETMIF (R5_ETM_0) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID: UG1087
Release Date: 2024-03-13
Revision: 1.10

ETMIF (R5_ETM_0) Register Description

Register Name	ETMIF
Offset Address	0x0000000ED8
Absolute Address	0x00FEBFCED8 (CORESIGHT_R5_ETM_0)
Width	32
Type	roRead-only
Reset Value	0x00000000
Description	Processor-ETM Interface Register

ETMIF (R5_ETM_0) Register Bit-Field Summary

Field Name	Bits	Type	Reset Value	Description
EVNTBUS_54	13	roRead-only	0	Returns the value of the EVNTBUS[54] input pin.
EVNTBUS_0	12	roRead-only	0	Returns the value of the EVNTBUS[0] input pin.
ETMCID_31	11	roRead-only	0	Returns the value of the ETMCID[31] input pin.
ETMCID_0	10	roRead-only	0	Returns the value of the ETMCID[0] input pin.
ETMDD_63	9	roRead-only	0	Returns the value of the ETMDD[63] input pin.
ETMDD_0	8	roRead-only	0	Returns the value of the ETMDD[0] input pin.
ETMDA_31	7	roRead-only	0	Returns the value of the ETMDA[31] input pin.
ETMDA_0	6	roRead-only	0	Returns the value of the ETMDA[0] input pin.
ETMDCTL_11	5	roRead-only	0	Returns the value of the ETMDCTL[11] input pin.
ETMDCTL_0	4	roRead-only	0	Returns the value of the ETMDCTL[0] input pin.
ETMIA_31	3	roRead-only	0	Returns the value of the ETMIA[31] input pin.
ETMIA_1	2	roRead-only	0	Returns the value of the ETMIA[1] input pin.
ETMICTL_13	1	roRead-only	0	Returns the value of the ETMICTL[13] input pin.
ETMICTL_0	0	roRead-only	0	Returns the value of the ETMICTL[0] input pin.