EXTINSELR (R5_ETM_1) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

EXTINSELR (R5_ETM_1) Register Description

Register NameEXTINSELR
Offset Address0x00000001EC
Absolute Address 0x00FEBFD1EC (CORESIGHT_R5_ETM_1)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionExtended External Input Selection Register

EXTINSELR (R5_ETM_1) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Sel_2nd_extin13:8rwNormal read/write0x0Selection value for second external input
Sel_1st_extin 5:0rwNormal read/write0x0Selection value for first external input