FECR (APM) Register Description
Register Name | FECR |
---|---|
Offset Address | 0x0000000400 |
Absolute Address |
0x00FD490400 (APM_CCI_INTC) 0x00FFA00400 (APM_INTC_OCM) 0x00FFA10400 (APM_LPD_FPD) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | Flag Enable |
0: disable. 1: enable.
FECR (APM) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
SMP_CNT_LAPSE_FLG | 21 | rwNormal read/write | 0x0 | Enable Sample Counter Lapse flag |
GCC_OFVL_FLG | 20 | rwNormal read/write | 0x0 | Enable Global Clock count overflow flag |
SFT_DATA_FLG_EN | 16 | rwNormal read/write | 0x0 | Enable software-written data flag |
LAST_READ_FLG | 6 | rwNormal read/write | 0x0 | Enable Last Read flag |
FIRST_READ_FLG | 5 | rwNormal read/write | 0x0 | Enable First Read flag |
READ_ADDR_FLG | 4 | rwNormal read/write | 0x0 | Enable Read Addr flag |
RESPONSE_FLG | 3 | rwNormal read/write | 0x0 | Enable Responese flag |
LAST_WRITE_FLG | 2 | rwNormal read/write | 0x0 | Enable Last Write flag |
FIRST_WRITE_FLG | 1 | rwNormal read/write | 0x0 | Enable First Write flag |
WRITE_ADDR_FLG | 0 | rwNormal read/write | 0x0 | Enable Write Addr flag |