GCCR_H (APMDDR) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

GCCR_H (APMDDR) Register Description

Register NameGCCR_H
Offset Address0x0000000000
Absolute Address 0x00FD0B0000 (APM_DDR)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionGlobal Clock

GCCR_H (APMDDR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
GLBCLKCNT_HIGHER31:0roRead-only0x0Higher 32-bit data of the Global Clock Counter Register. If C_GLOBAL_COUNT_WIDTH=32, only Lower 32 bits of the register are valid