GICC_DIR (GIC400) Register Description
| Register Name | GICC_DIR |
|---|---|
| Offset Address | 0x0000030000 |
| Absolute Address | 0x00F9030000 (ACPU_GIC) |
| Width | 32 |
| Type | woWrite-only |
| Reset Value | 0x00000000 |
| Description | Deactivate Interrupt Register |
GICC_DIR (GIC400) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| _ | 31:0 | woWrite-only | 0 | Refer to the Arm Generic Interrupt Controller Architecture Specification 2.0 for a detailed register descriptions. |