GICD_PIDR5 (GIC400) Register Description
Register Name | GICD_PIDR5 |
---|---|
Offset Address | 0x0000010FD4 |
Absolute Address | 0x00F9010FD4 (ACPU_GIC) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000000 |
Description | Peripheral ID5 Register |
GICD_PIDR5 (GIC400) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
_ | 31:0 | roRead-only | 0x0 | Refer to the Arm Generic Interrupt Controller Architecture Specification 2.0 for a detailed register descriptions. |