GICH_APR0_Alias2 (GIC400) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

GICH_APR0_Alias2 (GIC400) Register Description

Register NameGICH_APR0_Alias2
Offset Address0x00000504F0
Absolute Address 0x00F90504F0 (ACPU_GIC)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionActive Priority Register

GICH_APR0_Alias2 (GIC400) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
_31:0rwNormal read/write0x0Refer to the Arm Generic Interrupt Controller Architecture Specification 2.0 for a detailed register descriptions.