GLOBAL_GEN_STORAGE0 (PMU_GLOBAL) Register Description
| Register Name | GLOBAL_GEN_STORAGE0 |
|---|---|
| Offset Address | 0x0000000030 |
| Absolute Address | 0x00FFD80030 (PMU_GLOBAL) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Global Storage, Reg 0. |
Seven 32-bit general-purpose registers. Three registers are used by the FSBL and other Xilinx software products: GLOBAL_GEN_STORAGE{4:6}. The registers are cleared by a system reset.
GLOBAL_GEN_STORAGE0 (PMU_GLOBAL) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reg | 31:0 | rwNormal read/write | 0x0 | Bits [31:0] are R/W. The bits do not affect the hardware. The bits are not modified by the hardware or ROM. |