HEER (STM) Register Description
| Register Name | HEER |
|---|
| Offset Address | 0x0000000D00 |
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| Absolute Address |
0x00FE9C0D00 (CORESIGHT_SOC_STM)
|
|---|
| Width | 32 |
|---|
| Type | rwNormal read/write |
|---|
| Reset Value | 0x00000000 |
|---|
| Description | Enable Hardware Events for Trace |
|---|
This read/write register is used to enable hardware events to generate trace.The register defined one bit per hardware event. Writing 1 enables the appropriate hardware event, writing 0 disables the appropriate hardware event.
HEER (STM) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|
| HEE | 31:0 | rwNormal read/write | 0 | Hardware event enable, with one bit per hardware event:0 = hardware event disabled1 = hardware event enabled |